(China (Mainland))
Product Summary
The PALCE22V10H-15PC/4 is a 24-Pin EE CMOS (Zero Power) versatile PAL device, which provides user-programmable logic for replacing conventional SSI/MSI gates and flip-flops at a reduced chip count. At 30 μA maximum standby current, the PALCE22V10H-15PC/4 allows battery-powered operation for an extended period. The product terms are connected to the fixed OR array with a varied distribution from 8 to16 across the outputs (see Block Diagram).
Parametrics
PALCE22V10H-15PC/4 maximum ratings: (1)Output HIGH Voltage( IOH = -3.2 mA, VIN = VIH or VIL, VCC = Min): 2.4 V; (2)Output LOW Voltage( IOL = 16 mA, VIN = VIH or VIL, VCC = Min): 0.4 V; (3)Input HIGH Voltage(Guaranteed Input Logical HIGH; (4)Voltage for all Inputs): 2.0 V; (5)Input LOW Voltage(Guaranteed Input Logical LOW; (6)Voltage for all Inputs): 0.8 V; (7)Input HIGH Leakage Current( VIN = VCC, VCC = Max 2):10μA; (8)Input LOW Leakage Current( VIN = 0 V, VCC = Max): -100 μA; (9)Off-State Output Leakage Current HIGH( VOUT = VCC, VCC = Max,VIN = VIL or VIH ): 10 μA; (10)Off-State Output Leakage Current LOW(VOUT = 0 V, VCC = Max,VIN = VIL or VIH): -100 μA; (11)Output Short-Circuit Current(VOUT = 0.5 V, VCC = Max): -30 -130 mA.
Features
PALCE22V10H-15PC/4 features: (1)As fast as 5-ns propagation delay and 142.8 MHz fMAX(external); (2)Low-power EE CMOS; (3)10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs; (4)Varied product term distribution allows up to 16 product terms per output for complex functions; (5)Peripheral Component Interconnect (PCI) compliant (-5/-7/-10); (6)Global asynchronous reset and synchronous preset for initialization; (7)Extensive third-party software and programmer support; (8)24-pin SKINNY DIP, 24-pin SOIC, and 28-pin PLCC.
Diagrams
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